{"id":2782,"date":"2019-08-30T08:05:54","date_gmt":"2019-08-30T08:05:54","guid":{"rendered":""},"modified":"2019-08-30T16:06:11","modified_gmt":"2019-08-30T08:06:11","slug":"intel%e5%8f%91%e5%b8%83%e5%8f%af%e7%bc%96%e7%a8%8b%e5%9b%9b%e6%a0%b8a53%e7%9a%84fpga%e8%8a%af%e7%89%87","status":"publish","type":"post","link":"http:\/\/www.szryc.com\/?p=2782","title":{"rendered":"intel\u53d1\u5e03\u53ef\u7f16\u7a0b\u56db\u6838A53\u7684FPGA\u82af\u7247"},"content":{"rendered":"<p style=\"margin-right: 0px; margin-bottom: 12px; margin-left: 0px; padding: 0px; word-wrap: break-word; letter-spacing: 0.5px; font-size: 16px; text-indent: 2em; margin-top: 0px !important; color: rgb(51, 51, 51) !important; line-height: 30px !important; font-family: &quot;Microsoft yahei&quot;, \u5fae\u8f6f\u96c5\u9ed1 !important;\">\n\t<u style=\"color: rgb(51, 51, 51) !important;\">FPGA<\/u>\u5728\u9ad8\u5ea6\u5e76\u884c\u3001\u5927\u541e\u5410\u91cf\u6570\u5b57\u4fe1\u53f7\u5904\u7406(<u style=\"color: rgb(51, 51, 51) !important;\">DSP<\/u>)\u5e94\u7528\u65b9\u9762\u4eab\u6709\u5f88\u597d\u7684\u58f0\u8a89\u3002\u8fc7\u53bb\u51e0\u4ee3FPGA\u5668\u4ef6\u4e00\u76f4\u7a33\u5b9a\u7684\u589e\u5f3a\u8fd9\u65b9\u9762\u7684\u7279\u6027\u3002\u4f46\u662f\uff0c\u5f88\u5c11\u6709\u4e00\u79cd\u9769\u547d\u6027\u7684\u800c\u4e0d\u662f\u6e10\u8fdb\u5f0f\u7684\u65b0\u4ea7\u54c1\u51fa\u73b0\u3002<u style=\"color: rgb(51, 51, 51) !important;\">intel<\/u>\u65e9\u57282015\u5e74\u5927\u624b\u7b14\u7684\u6536\u8d2d\u4e86<u style=\"color: rgb(51, 51, 51) !important;\">Altera<\/u>\uff0c\u800c\u5c31\u5728\u6700\u8fd1In<u style=\"color: rgb(51, 51, 51) !important;\">te<\/u>l\u4eca\u5929\u5ba3\u5e03\u5df2\u7ecf\u5f00\u59cb\u51fa\u8d27Stra<u style=\"color: rgb(51, 51, 51) !important;\">ti<\/u>x 10 SX FPGA\u53ef\u7f16\u7a0b\u82af\u7247\uff0c\u8fd9\u662f\u76ee\u524d\u552f\u4e00\u96c6\u6210\u56db\u6838\u5fc3<u style=\"color: rgb(51, 51, 51) !important;\">ARM<\/u>&nbsp;A53&nbsp;<u style=\"color: rgb(51, 51, 51) !important;\">CPU<\/u>\u5904\u7406\u5668\u7684FPGA\uff0c\u4e5f\u662fIntel\u6536\u8d2dAltera\u4e4b\u540e\u7684\u4e00\u5927\u6210\u679c\u3002<\/p>\n<p align=\"center\" style=\"margin: 0px 0px 12px; padding: 0px; word-wrap: break-word; letter-spacing: 0.5px; font-size: 16px; color: rgb(51, 51, 51) !important; line-height: 30px !important; font-family: &quot;Microsoft yahei&quot;, \u5fae\u8f6f\u96c5\u9ed1 !important;\">\n\t<img decoding=\"async\" alt=\"intel\u53d1\u5e03\u53ef\u7f16\u7a0b\u56db\u6838A53\u7684FPGA\u82af\u7247\" src=\"http:\/\/www.szryc.com\/uploads\/allimg\/190830\/1606114919-0.png\" style=\"border: 0px; vertical-align: middle; cursor: pointer; margin: 0px auto; display: block; max-width: 100%; border-radius: 2px; height: 324px; width: 450px;\" \/><\/p>\n<div id=\"new-middle-berry\" style=\"margin: 0px 0px 15px; padding: 0px; color: rgb(51, 51, 51); word-wrap: break-word; font-size: 16px; font-family: \u5fae\u8f6f\u96c5\u9ed1;\">\n\t&nbsp;<\/div>\n<p style=\"margin: 0px 0px 12px; padding: 0px; word-wrap: break-word; letter-spacing: 0.5px; font-size: 16px; text-indent: 2em; color: rgb(51, 51, 51) !important; line-height: 30px !important; font-family: &quot;Microsoft yahei&quot;, \u5fae\u8f6f\u96c5\u9ed1 !important;\">\n\tStraTIx 10 SX FPGA\u91c7\u7528\u4e86\u5168\u65b0\u7684Hype<u style=\"color: rgb(51, 51, 51) !important;\">rF<\/u>lex\u5185\u6838\u4f53\u7cfb\u67b6\u6784\uff0c\u5355\u82af\u7247\u6574\u5408\u4e86\u7075\u6d3b\u3001\u4f4e\u5ef6\u8fdf\u76841.<u style=\"color: rgb(51, 51, 51) !important;\">5G<\/u>Hz ARM\u5904\u7406\u5668\u548c\u9ad8\u6027\u80fd\u3001\u9ad8\u5bc6\u5ea6\u7684FPGA\uff0c\u5bc6\u5ea6\u8d85\u8fc7100\u4e07\u903b\u8f91\u5355\u5143(MLE)\u3002Intel\u58f0\u79f0\u5b83\u7684\u6027\u80fd\u6bd4\u4e0a\u4ee3\u4ea7\u54c1\u63d0\u53472\u500d\uff0c\u529f\u8017\u5219\u964d\u4f4e\u4e8670\uff05\uff0c\u975e\u5e38\u9002\u54085G<u style=\"color: rgb(51, 51, 51) !important;\">\u65e0\u7ebf\u901a\u4fe1<\/u>\u3001\u8f6f\u4ef6\u5b9a\u4e49<u style=\"color: rgb(51, 51, 51) !important;\">\u5c04\u9891<\/u>\u3001\u519b\u4e8b\u5b89\u5168\u8ba1\u7b97\u3001\u7f51\u7edc\u529f\u80fd\u865a\u62df\u5316(NFV)\u3001\u6570\u636e\u4e2d\u5fc3\u52a0\u901f\u7b49\u3002<\/p>\n<p align=\"center\" style=\"margin: 0px 0px 12px; padding: 0px; word-wrap: break-word; letter-spacing: 0.5px; font-size: 16px; color: rgb(51, 51, 51) !important; line-height: 30px !important; font-family: &quot;Microsoft yahei&quot;, \u5fae\u8f6f\u96c5\u9ed1 !important;\">\n\t<img decoding=\"async\" alt=\"intel\u53d1\u5e03\u53ef\u7f16\u7a0b\u56db\u6838A53\u7684FPGA\u82af\u7247\" src=\"http:\/\/www.szryc.com\/uploads\/allimg\/190830\/160611EI-1.png\" style=\"border: 0px; vertical-align: middle; cursor: pointer; margin: 0px auto; display: block; max-width: 100%; border-radius: 2px; height: 285px; width: 450px;\" \/><\/p>\n<p style=\"margin: 0px 0px 12px; padding: 0px; word-wrap: break-word; letter-spacing: 0.5px; font-size: 16px; text-indent: 2em; color: rgb(51, 51, 51) !important; line-height: 30px !important; font-family: &quot;Microsoft yahei&quot;, \u5fae\u8f6f\u96c5\u9ed1 !important;\">\n\t\u8be5\u82af\u7247\u91c7\u7528Intel 14nm\u5de5\u827a<u style=\"color: rgb(51, 51, 51) !important;\">\u5236\u9020<\/u>\uff0c\u5177\u590796\u4e2a\u5168\u53cc\u5de5<u style=\"color: rgb(51, 51, 51) !important;\">\u6536\u53d1\u5668<\/u>\u901a\u9053\uff0c\u6536\u53d1\u5668\u6570\u636e\u901f\u7387\u8fbe28.3Gbps\uff0c\u6d6e\u70b9\u8ba1\u7b97\u6027\u80fd10TFlops\uff0c\u914d\u5907\u4e13\u7528\u5b89\u5168\u5668\u4ef6\u7ba1\u7406\u5668(SDM)\uff0c\u652f\u6301AES-256\u3001SHA-256\/384\u3001ECDSA-256\/384\u52a0\u89e3\u5bc6\u52a0\u901f\u8ba4\u8bc1\u3002<\/p>\n","protected":false},"excerpt":{"rendered":"<p>FPGA \u5728\u9ad8\u5ea6\u5e76\u884c\u3001\u5927\u541e\u5410\u91cf\u6570\u5b57\u4fe1\u53f7\u5904\u7406( DSP )\u5e94\u7528\u65b9\u9762\u4eab\u6709\u5f88\u597d\u7684\u58f0\u8a89\u3002\u8fc7\u53bb\u51e0\u4ee3FPGA\u5668\u4ef6\u4e00\u76f4\u7a33\u5b9a\u7684\u589e\u5f3a\u8fd9\u65b9\u9762\u7684\u7279\u6027\u3002\u4f46\u662f\uff0c\u5f88\u5c11\u6709\u4e00\u79cd\u9769\u547d\u6027\u7684\u800c\u4e0d\u662f\u6e10\u8fdb\u5f0f\u7684\u65b0\u4ea7\u54c1\u51fa\u73b0\u3002 inte<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[14],"tags":[],"class_list":["post-2782","post","type-post","status-publish","format-standard","hentry","category-14"],"_links":{"self":[{"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/posts\/2782","targetHints":{"allow":["GET"]}}],"collection":[{"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"http:\/\/www.szryc.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=2782"}],"version-history":[{"count":0,"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/posts\/2782\/revisions"}],"wp:attachment":[{"href":"http:\/\/www.szryc.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=2782"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"http:\/\/www.szryc.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=2782"},{"taxonomy":"post_tag","embeddable":true,"href":"http:\/\/www.szryc.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=2782"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}