\n\t\/\/ ACLK= n\/a\uff0c MCLK= SMCLK= default DCO ~ 800k<\/p>\n
\n\t\/\/<\/p>\n
\n\t\/\/ MSP430F13x<\/p>\n
\n\t\/\/ -------------------<\/p>\n
\n\t\/\/ \/|| XIN|-<\/p>\n
\n\t\/\/ | | | 32kHz<\/p>\n
\n\t\/\/ --|RS<\/u>T XOUT|-<\/p>\n
\n\t\/\/ | |<\/p>\n
\n\t\/\/ | P1.2|--\u300bLED<\/p>\n
\n\t\/\/<\/p>\n
\n\t\/\/<\/p>\n
\n\t\/\/ \u786c\u4ef6\u7535\u8def<\/u>\uff1aMSP430F135\u6838\u5fc3\u5b9e\u9a8c\u677f-I\u578b<\/p>\n
\n\t\/\/ \u786c\u4ef6\u8fde\u63a5\uff1a<\/p>\n
\n\t\/\/<\/p>\n
\n\t\/\/ \u8c03\u8bd5\u5668\uff1aMSP430FET\u5168\u7cfb\u5217JTAG\u4eff\u771f\u5668<\/u><\/p>\n
\n\t\/\/ \u8c03\u8bd5\u8f6f\u4ef6\uff1a IAR Embedded Workbench Version\uff1a 3.41A \u7f16\u8bd1<\/p>\n
\n\t\/\/******************************************************************************<\/p>\n
\n\t![\"MSP430\u5355\u7247\u673a\u5b9e\u73b0PWM\u63a7\u5236LED\u706f\u7684\u8bbe\u8ba1\"](\"http:\/\/www.szryc.com\/uploads\/allimg\/190408\/2121141320-0.png\")
<\/p>\n
\n\t#include<\/p>\n
\n\tvoid Init_CLK\uff08void\uff09;<\/p>\n
\n\tvoid Init_Ti<\/u>merA\uff08void\uff09;<\/p>\n
\n\tunsigned int nCount;<\/p>\n
\n\tvoid Init_CLK\uff08void\uff09<\/p>\n
\n\t{<\/p>\n
\n\tunsigned int i;<\/p>\n
\n\t\/\/\u5c06\u5bc4\u5b58\u5668<\/u>\u7684\u5185\u5bb9\u6e05\u96f6<\/p>\n
\n\t\/\/XT2\u9707\u8361\u5668\u5f00\u542f<\/p>\n
\n\t\/\/LFTX1\u5de5\u4f5c\u5728\u4f4e\u9891\u6a21\u5f0f<\/p>\n
\n\t\/\/ACLK\u7684\u5206\u9891\u56e0\u5b50\u4e3a1<\/p>\n
\n\tBCSCTL1 = 0X00;<\/p>\n
\n\tdo<\/p>\n
\n\t{<\/p>\n
\n\t\/\/ \u6e05\u9664OSCFault\u6807\u5fd7<\/p>\n
\n\tIFG1 &= ~OFIFG;<\/p>\n
\n\tfor \uff08i = 0x20; i \u300b 0; i--\uff09;<\/p>\n
\n\t}<\/p>\n
\n\twhile \uff08\uff08IFG1 & OFIFG\uff09 == OFIFG\uff09;<\/p>\n
\n\tBCSCTL2 = 0X00;<\/p>\n
\n\t\/\/MCLK\u7684\u65f6\u949f<\/u>\u6e90\u4e3aTX2CLK:2.048MHz\uff0c\u5206\u9891\u56e0\u5b50\u4e3a0<\/p>\n
\n\tBCSCTL2 += SELM1 + DIVM_0;<\/p>\n
\n\t\/\/SMCLK\u7684\u65f6\u949f\u6e90\u4e3aTX2CLK:2.048MHz\uff0c\u5206\u9891\u56e0\u5b50\u4e3a1<\/p>\n
\n\tBCSCTL2 += SELS + DIVS_0;<\/p>\n
\n\treturn;<\/p>\n
\n\t}<\/p>\n
\n\tvoid Init_TImerA\uff08void\uff09<\/p>\n
\n\t{<\/p>\n
\n\tnCount = 0;<\/p>\n
\n\tTACTL = TASSEL1 + TACLR;\/\/ \u9009\u62e9SMCLK\uff0c\u6e05\u9664TAR<\/p>\n
\n\tCCTL0 = CCIE;\/\/ CCR0 \u4e2d\u65ad\u5141\u8bb8<\/p>\n
\n\tCCR0 = 65535 - 1;\/\/ PWM\u5468\u671f\u4e3a256<\/p>\n
\n\tCCTL1 = OUTMOD_7;\/\/ CCR1\u8f93\u51fa\u6a21\u5f0f\u4e3a“\u590d\u4f4d\/\u7f6e\u4f4d”\u6a21\u5f0f<\/p>\n
\n\tTACTL |= MC1;\/\/ \u589e\u8bb0\u6570\u6a21\u5f0f<\/p>\n
\n\treturn;<\/p>\n
\n\t}<\/p>\n
\n\t#pragmavector=TIMERA0_VECTOR\/\/TImer_A\u4e2d\u65ad\u51fd\u6570<\/p>\n
\n\t__inte<\/u>rrupt void TImerA_ISR\uff08\uff09<\/p>\n
\n\t{<\/p>\n
\n\tnCount += 655;<\/p>\n
\n\tCCR1 = nCount;<\/p>\n
\n\t}<\/p>\n
\n\tint mai<\/u>n\uff08void\uff09<\/p>\n
\n\t{<\/p>\n
\n\t\/\/ \u5173\u95ed\u770b\u95e8\u72d7<\/u><\/p>\n
\n\tWDTCTL = WDTPW + WDTHOLD;<\/p>\n
\n\tP1DIR |= BIT2;\/\/ P1.2\u4e3a\u8f93\u51fa<\/p>\n
\n\tP1SEL |= BIT2;\/\/ \u9009\u62e9P1.2\u4e3aTA1\u7ba1\u811a<\/p>\n
\n\t\/\/ \u5173\u95ed\u4e2d\u65ad<\/p>\n
\n\t_DINT\uff08\uff09;<\/p>\n
\n\t\/\/ \u521d\u59cb\u5316<\/p>\n
\n\tInit_CLK\uff08\uff09;<\/p>\n
\n\tInit_TimerA\uff08\uff09;<\/p>\n
\n\t\/\/ \u6253\u5f00\u4e2d\u65ad<\/p>\n
\n\t_EINT\uff08\uff09;<\/p>\n
\n\tfor\uff08;;\uff09<\/p>\n
\n\t{<\/p>\n
\n\t\/\/CUP\u8fdb\u5165\u4f4e\u529f\u8017\u6a21\u5f0f<\/p>\n
\n\t_BIS_SR\uff08LPM0_bits\uff09;<\/p>\n
\n\t_NOP\uff08\uff09;<\/p>\n
\n\t}<\/p>\n
\n\t}<\/p>\n","protected":false},"excerpt":{"rendered":"
\u63cf\u8ff0\uff1a MSP430 \u5b9e\u73b0PWM\u3002\u53cd\u6620\u5728LED\u706f\u4e0a\uff0c\u53ef\u4ee5\u770b\u5230LED\u706f\u7684\u4eae\u5ea6\u4e0d\u65ad\u53d8\u5316 \/\/ \/\/ ACLK= n\/a\uff0c MCLK= SMCLK= default DCO ~ 800k \/\/ \/\/ MSP430F13x \/\/ ——————- \/\/ \/|| XIN|- \/\/ | | | 32kHz \/\/ –| RS T XOUT|- \/\/ | | \/\/ |<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[14],"tags":[],"class_list":["post-2305","post","type-post","status-publish","format-standard","hentry","category-14"],"_links":{"self":[{"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/posts\/2305","targetHints":{"allow":["GET"]}}],"collection":[{"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"http:\/\/www.szryc.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=2305"}],"version-history":[{"count":0,"href":"http:\/\/www.szryc.com\/index.php?rest_route=\/wp\/v2\/posts\/2305\/revisions"}],"wp:attachment":[{"href":"http:\/\/www.szryc.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=2305"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"http:\/\/www.szryc.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=2305"},{"taxonomy":"post_tag","embeddable":true,"href":"http:\/\/www.szryc.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=2305"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}